MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor

Christoph Pöpper, Oliver Mischke, Tim Güneysu

International Symposium on Applied Reconfigurable Computing - ARC2014, Vilamoura, Algarve, Portugal. To appear.


In this work we present a lightweight co-processor for asymmetric cryptography. While focusing on standardized elliptic curve cryptography over prime fields, the architecture has been chosen generic enough to also allow to perform RSA operations on the same hardware. Compared to previous work our processor distinguishes itself by not only having on par performance with recent work in this field, but also by being able to additionally apply state of the art side-channel analysis countermeasures to protect the implementation against timing and power analysis attacks. Different countermeasures can be dynamically selected at runtime, allowing a flexible trade-off between security and performance. Utilizing a specialized 32-bit ALU and a microcode-based control unit, it is possible to easily reprogram the controller after deployment allowing to make changes to the implemented algorithm or countermeasures by updating the microcode. This allows to keep some of the reconfigurability of FPGA-based designs even when fabricating the proposed core as an ASIC.

tags: ARC, ecc, RSA, Side-Channel