Priv.-Doz. Dr. Amir Moradi
- Privat-Dozent/in - Chair Security Engineering
- Former Assistant - Chair Embedded Security
Address
ID 2-605
Security Engineering Group
Ruhr-Universitaet Bochum
Universitaetsstr. 150
44780 Bochum
Germany
- Room
- ID 2/605
- Phone:
- (+49)(0)234 / 32 - 27219
- Email:
- amir.moradi@rub.de PGP key
- Website:
- https://www.seceng.rub.de/moradi
Vita
- Since 1/2020: Academic Councilor (Akademischer Rat)Security Engineering, Ruhr-Universität Bochum, Germany
- 2016-2019: Academic Councilor (Akademischer Rat)Embedded Security, Ruhr-Universität Bochum, Germany
- Since 10/2015: Faculty Member (Privatdozent)Faculty of Electrical Engineering and Information Sciences, Ruhr-Universität Bochum, Germany
- 2015: Habilitation in Embedded Security ("Advances in Side-Channel Security")Ruhr-Universität Bochum, Germany
- 2009-2016: post-doctoral researcherEmbedded Security, Ruhr-Universität Bochum, Germany
- 2008: PhD in Computer EngineeringSharif University of Technology, Tehran, Iran
- 2007-2008: visiting PhD studentEmbedded Security, Ruhr-Universität Bochum, Germany
- 2004: MSc in Computer EngineeringSharif University of Technology, Tehran, Iran
- 2001: BSc in Computer EngineeringShahid Beheshti University, Tehran, Iran
Research
- Side-Channel Cryptanalysis
- Efficient Implementation of Cryptographic Algorithms
- Applied Cryptography
Awards/Honors
- Co-author of the Best Student-Paper Award at International Conference on Applied Cryptography and Network Security - ACNS 2014.
- Best Paper Award at International Workshop on Constructive Side-Channel Analysis and Secure Design - COSADE 2015.
- Nominated for the best paper award at Workshop on Cryptographic Hardware and Embedded Systems - CHES 2015.
- Co-author of the Best Student-Paper Award at IEEE International Symposium on Hardware Oriented Security and Trust - HOST 2016.
- Nominated for the best paper award at Design, Automation & Test in Europe Conference & Exhibition - DATE 2017.
- Nominated for the best paper award at Design, Automation & Test in Europe Conference & Exhibition - DATE 2018.
- Best paper award at Conference on Cryptographic Hardware and Embedded Systems - CHES 2019.
- Distinguished Paper award at USENIX Security Symposium - USENIX 2020.
Teaching
- since Summer 2011, Physical Attacks and Countermeasures, Dep. of Elect. Engineering and Info. Sciences, Ruhr University Bochum, 141028.
- since Winter 2015/16, Cryptography on Hardware-based Platforms, Dep. of Elect. Engineering and Info. Sciences, Ruhr University Bochum, 141031.
- since Winter 2010/11, Side-Channel Attacks (Lab Course), Dep. of Elect. Engineering and Info. Sciences, Ruhr University Bochum, 142023.
- Winter 2009/10 - Winter 2014/15, Embedded Smartcard Microcontrollers (Lab Course), Dep. of Elect. Engineering and Info. Sciences, Ruhr University Bochum, 142020.
- Fall 2006, Spring 2007, Logical Circuits, Department of Computer Engineering, Sharif University of Technology, CE40212.
- Spring 2006, Summer 2006, Digital Electronics Lab, Department of Computer Engineering, Sharif University of Technology, CE40307.
- Summer 2001, Logical Circuits Lab, Department of Computer Engineering, Sharif University of Technology, CE40206.
Program Committee Membership
Editorial Board Membership
- PC co-chair of Smart Card Research and Advanced Application Conference (CARDIS 2014).
- PC co-chair of International Workshop on Lightweight Cryptography for Security & Privacy (LightSec 2015).
- PC co-chair of Cryptographic Hardware and Embedded Systems (CHES 2020).
- Associate Editor of International Journal of Applied Cryptography 2011-2020 (IJACT).
- Associate Editor of IEEE Transactions on Emerging Topics in Computing (IEEE-TETC).
- Associate Editor of Journal of Cryptographic Engineering (JCEN).
Selected Talks
- Statistical Tools Flavor Side-Channel Collision Attacks EUROCRYPT 2012, April 17, Cambridge, UK. (talk)
- Breaking the Bitstream Decryption of FPGAs invited talk at ECRYPT II Summer School: Challenges in Security Engineering, 2012, September 5, Bochum, Germany.
- How Far Should Theory Be from Practice? Evaluation of a Countermeasure CHES 2012, September 10, Leuven, Belgium.
- On the Simplicity of Converting Leakages from Multivariate to Univariate CHES 2013, August 21, Santa Barbara, US.
- Altera vs. Xilinx which one keeps your design hidden? rump session CHES 2013, August 22, Santa Barbara, US.
- Side-Channel Countermeasures for Hardware: is There a Light at the End of the Tunnel? invited talk at Worcester Polytechnic Institute, 2013, September 11, Worcester, US.
- Evaluation of Side-Channel Leakages through Statistical Moments invited talk at Bosch GmbH, 2014, March 13, Stuttgart, Germany.
- Side-Channel Leakage through Static Power Should We Care about in Practice? invited talk at NXP Semiconductors, 2014, April 22, Hamburg, Germany (+ CHES 2014, September 26, Busan, South Korea).
- Early Propagation and Imbalanced Routing, How to Diminish in FPGAs CHES 2014, September 26, Busan, South Korea.
- Physical Attacks, extracting the secrets from cryptographic devices invited talk at Bauhaus-Universität Weimar, 2015, January 22, Weimar, Germany.
- Side-Channel Security Analysis of Ultra-Low-Power FRAM-based MCUs COSADE 2015, April 14, Berlin, Germany.
- Hiding Higher-Order Leakages in Hardware invited talk at TI day, KU Leuven, Belgium.
- Leakage Assessment Methodology - a clear roadmap for side-channel evaluations invited talk at Sharif University of Technology, 2015, August 29, Tehran, Iran.
- Improved Side-Channel Analysis Attacks on Xilinx Bitstream Encryption of 5, 6, and 7 Series COSADE 2016, April 14, Graz, Austria.
- Masking as a Side-Channel Countermeasure in Hardware invited tutorial at ISCISC 2016, September 6, Tehran, Iran.
- Moments-Correlating DPA CCS 2016 Workshops (TIS), October 24, Vienna, Austria.
- Side-Channel Analysis Protection and Low-Latency in Action - case study of PRINCE and Midori ASIACRYPT 2016, December 07, Hanio, Vietnam. (talk)
- Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives CHES 2017, September 28, Taipei, Taiwan. (talk)
- The First Thorough Side-Channel Hardware Trojan ASIACRYPT 2017, December 05, Hong Kong, China. (talk) + at Theory of Implementation Security (TIS) Workshop 2018, January 09, Zurich, Switzerland
- Exploring the Effect of Device Aging on Static Power Analysis Attacks CHES 2019, August 28, Atlanta, USA. (talk)
- How to Apply Threshold Implementation to any PUF Primitive invited talk at Theory of Implementation Security (TIS) Workshop 2019, November 11, London, England
Current PhDs
Joint Supervision
- Maik Ender (with Christof Paar)
Finished PhDs
- Oliver Mischke (jointly supervised with Tim Güneysu)
- Pascal Sasdrich (jointly supervised with Tim Güneysu)
- Tobias Schneider (jointly supervised with Tim Güneysu)
- Alexander Wild (jointly supervised with Tim Güneysu)
- Bastian Richter
I am always looking for PhD students/Post-docs that have shown outstanding performance in their previous studies and research. If you feel fitting into the group, send your application via e-mail.
Projects
- NaSCA- Nano-Scale Side-Channel Analysis: Physical Security for Next-Generation CMOS ICs (DFG 2016-2020)
- VeriSec- Computer-Assisted Integration and Verification of Masking in Cryptographic Implementations (BMBF 2017-2020)
- SysKit- A Development Tool for Secure Communications in Industry 4.0 (BMBF 2017-2020)
- GreenSec- Security for Internet of Things with Low Energy and Low Power Consumption (DFG 2018-2021)
- SuCCESS- SymmetriC CiphEr design with inherent phySical Security (DFG 2019-2022)
- Aged but Fit- Long Lasting Security for Trusted Platforms (DFG 2020-2022)
- mINDFUL - Intrusion Detection in Industry 4.0 via Fusion of Physical Channels using Artificial Intelligence (BMBF 2020-2023)
- SAUBER - phySicAlly secUre reconfiguraBlE platfoRm (DFG 2020-2023)
Courses
- 141035: Bachelor-Seminar Security Engineering
- 142023: Master Practical Course Side Channel Attacks
- 141034: Master-Seminar Security Engineering
- 141028: Physical Attacks and Countermeasures